A sampled spur free fractional frequency synthesizer and its noise analysis

Marc Houdebine (1, 2) , Sébastien Dedieu (2) , Olivier Sename (1) , Mazen Alamir (1)

1 LAG - Laboratoire d'automatique de Grenoble
2 ST-CROLLES - STMicroelectronics [Crolles]

This paper presents a new fractional frequency synthesizer architecture and its noise analysis model. The proposed analysis model takes into account the sampled behavior of the PLL. In order to validate this study, measurement results illustrate the output frequency purity and the reliability of the model.

Mots clés: fractional frequency synthesis; PLL; sampled system; phase noise

Domaines: Micro et nanotechnologies/Microélectronique

Marc Houdebine, Sébastien Dedieu, Olivier Sename, Mazen Alamir. A sampled spur free fractional frequency synthesizer and its noise analysis. 2006. ⟨hal-00086709⟩