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Article Dans Une Revue IEEE Journal of Solid-State Circuits Année : 1998

A new low-power GaAs two-single-port memory cell

Résumé

This paper describes an experimental static memory cell in GaAs MESFET technology. The memory cell has been implemented using a mix of several techniques already published in order to overcome some of their principal drawbacks related to ground shifting, destructive readout, and leakage current effects. The cell size is 36*37 mu m/sup 2/ using a 0.6- mu m technology. An experimental 32 word * 32 bit array has been designed. From simulation results, an address access time of 1 ns has been obtained. A small 8 word*4 bit protoype was fabricated. The cell can be operated at the single supply voltage from 1 up to 2 V. The evaluation is provided according to the functionality and power dissipation. Measured results show a total current consumption of 14 mu A/cell when operated at 1 V.
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Dates et versions

hal-00014401 , version 1 (24-11-2005)

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Citer

A. Bernal, A. Guyot. A new low-power GaAs two-single-port memory cell. IEEE Journal of Solid-State Circuits, 1998, July ; 33(7), pp.1103-10. ⟨10.1109/4.701272⟩. ⟨hal-00014401⟩

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