Fail-safe interfaces for VLSI: theoretical foundations and implementation

M. Nicolaidis (1, 2)

1 IROC TECHNOLOGIES - iROc Technologies
2 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés

This paper presents the design of strongly fail-safe interfaces which transform binary signals, generated by a system with error detection capabilities and eventually with fault-tolerant capabilities, into fail-safe signals, that is to say, into signals which, in the presence of failures, will be either correct or safe. The strongly fail-safe property is achieved by means of concurrent checking techniques. The interest of these interfaces is that they can be implemented in VLSI, while the conventional fail-safe interfaces require using discrete components. A formal theory of fail-safe systems is developed to guide the implementation of the new solutions.

Keywords: fail-safe-interfaces; binary-signals; fault-tolerant-capabilities; fail-safe-property; formal-theor; VLSI-; fail-safe-circuits

Domains: Micro and nanotechnologies/Microelectronics

M. Nicolaidis. Fail-safe interfaces for VLSI: theoretical foundations and implementation. IEEE Transactions on Computers, 1998, Jan. ; 47(1), pp.62-77. ⟨10.1109/12.656082⟩. ⟨hal-00013862⟩