Fault simulation of MEMS using HDLs

B. Charlot (1) , Salvador Mir (1) , B. Courtois (1)

1 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés

As next generation chips embedding MEMS appear, fault-based and defect-oriented tests for MEMS parts become important for cost-effective production testing. This paper describes an approach to fault simulation of Micro-Electro-Mechanical Systems (MEMS) using an analog Hardware Description Language (HDL). An electro-thermal converter is used as test vehicle, for which an equivalent electrical model is readily obtained. Typical defects and failure mechanisms which can affect these devices fabricated using CMOS-compatible bulk micromachining are shown. These defects are used for illustrating the fault simulation approach which appears to be more comprehensive and systematic than previous approaches.

Mots clés: fault-simulation; micro-electro-mechanical-systems; MEMS-; analog-HDL; hardware-description-language

Domaines: Micro et nanotechnologies/Microélectronique

B. Charlot, Salvador Mir, B. Courtois. Fault simulation of MEMS using HDLs. Journal of Modeling and Simulation of Microsystems, 2001, 2(1), pp.35-42. ⟨hal-00012870⟩