SEU and latch-up results for SPARC processors

F. Estreme (1) , T. Chapuis (1) , Raoul Velazco (2) , S. Karoui (1) , R. Trigaux (1) , D. Benezech (1) , L.H. Rosier (1)

1 CNES - Centre National d'Études Spatiales [Toulouse]
2 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés

SPARC microprocessors are being considered for space applications but no data is available on their behaviour under radiation. In this paper we present results obtained under heavy ions and protons on both MHS and LSI circuits.

Mots clés: SEU; SPARC-processors; space-applications; radiation-behaviour; heavy-ions; protons; MHS-circuits; single-event-upset; space-electronics

Domaines: Micro et nanotechnologies/Microélectronique

F. Estreme, T. Chapuis, Raoul Velazco, S. Karoui, R. Trigaux, et al.. SEU and latch-up results for SPARC processors. IEEE Radiation Effects Data Workshop (REDW'1993), Jul 1993, Snowbird, Utah, United States. pp.13-19. ⟨hal-00008259⟩