Software detection mechanisms providing full coverage against single bit-flip faults

B. Nicolescu (1) , B.Y. Savaria (1) , Raoul Velazco (2)

1 EPM - École Polytechnique de Montréal
2 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés

Increasing design complexity for current and future generations of microelectronic technologies leads to an increased sensitivity to transient bit-flip errors. These errors can cause unpredictable behaviors and corrupt data integrity and system availability. This work proposes new solutions to detect all classes of faults, including those that escape conventional software detection mechanisms, allowing full protection against transient bit-flip errors. The proposed solutions, particularly well suited for low-cost safety-critical microprocessor-based applications, have been validated through exhaustive fault injection experiments performed on a set of real and synthetic benchmark programs. The fault model taken into consideration was single bit-flip errors corrupting memory cells accessible to the user by means of the processor instruction set. The obtained results demonstrate the effectiveness of the proposed solutions.

Mots clés: data flow computing error handling fault tolerant computing integrated circuit testing ion beam effects logic testing

Domaines: Micro et nanotechnologies/Microélectronique

B. Nicolescu, B.Y. Savaria, Raoul Velazco. Software detection mechanisms providing full coverage against single bit-flip faults. IEEE Transactions on Nuclear Science, 2004, Volume: 51, Issue: 6, pp.3510- 3518. ⟨10.1109/TNS.2004.839110⟩. ⟨hal-00005733⟩