Performances under saturation operation of p channel FinFETs on SOI substrates at cryogenic temperature

Hakim Hachour (1) , Bogdan Cretu (1) , Jean-Marc Routoure (1) , Régis Carin (1) , A. Benfdila (2) , E. Simoen (3) , Cor Claeys (3, 4)

1 Equipe Electronique - Laboratoire GREYC - UMR6072
2 UMMTO - Université Mouloud Mammeri [Tizi Ouzou]
3 IMEC - IMEC
4 KU-ESAT - Department of Electrical Engineering [KU Leuven]

The impact of cryogenic temperature operation on the short channel effects and analog performances was analysed on strained and unstrained p-channel SOI FinFETs. The main electrical parameters extracted from the saturation mode of operation are investigated and compared to those found at room temperature. Low frequency noise measurements at 10 K operation show that the carrier number fluctuations dominate the flicker noise in moderate inversion, while the access resistance noise contributions prevail in strong inversion.

Mots clés: FinFET; SOI; strain; DIBL; Early voltage; intrinsic gain; low frequency noise

Domaines: Electronique

Hakim Hachour, Bogdan Cretu, Jean-Marc Routoure, Régis Carin, A. Benfdila, et al.. Performances under saturation operation of p channel FinFETs on SOI substrates at cryogenic temperature. IEEE/CAS’2014, 2014, Sinaia, Romania. pp181-184, ⟨10.1109/SMICND.2014.6966429⟩. ⟨hal-01196289⟩