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A. .. Architecture-reconfigurable-dynamiquement-tolérante-aux-fautes, A. Block, and B. , Application Specific Integrated Circuit, Bit Error Rate BIST . . . . . . . . . Built-In Self Test BRAM . . . . . . . Block Random Access Memory BTI . . . . . . . . . . . Bias Temperature Instability CAD . . . . . . . . . Computer-Aided Design

C. Block, C. Block, and C. , Concurrent Error Detection, Complex Programmable Logic Device CRAM . . . . . . . Configuration Random-Access Memory

N. Negative-bias-temperature-instability, N. Programmable-logic-device, and P. , Negative Metal Oxide Semiconductor PLD Positive Metal Oxide Semiconductor PRM Single-Error Correcting, Partially Reconfigurable Module PRR . . . . . . . . . . Partial Reconfigurable Region PTMR . . . . . . . Partial Triple Modular Redundancy QMR . . . . . . . . . Quadruple Modular Redundancy R3M . . . . . . . . . . Run-rime Reconfigurable Resource Manager SBU . . . . . . . . . . Single Bit Upset SEB . . . . . . . . . . Single Event Burnout SEC