Integration of Code-Level and System-Level Timing Analysis for Early Architecture Exploration and Reliable Timing Verification

C Ferdinand (1) , R Heckmann (1) , D Kästner , K Richter , N Feiertag , M Jersak

1 Angewandte Informatik - AbsInt GmbH

Developers of safety-critical real-time systems have to ensure that their systems react within given time bounds. Sophisticated tools for timing analysis at the code-level, controller-level and networked system-level are becoming state-of-the-art for efficient timing verification in light of ever increasing system complexity. This trend is exemplified by two tools: AbsInt's timing analyzer aiT, which can determine safe upper bounds for the execution times (WCETs) of non-interrupted tasks, and Symtavision's SymTA/S tool, which computes the worst-case response times (WCRTs) [7, 11, 16]. of an entire system from the task WCETs and information about possible interrupts and their priorities. The two tools thus complement each other in an ideal way. They have recently been coupled to further increase their utility. Starting from a system model, a designer can now seamlessly perform timing budgeting, performance optimization and timing verification, considering both the code of individual functions, as well as function and subsystem integration. The paper explains and exemplifies various use cases and tool flows.

Mots clés: Schedulability analysis; timing analy- sis; worst-case timing verification; architecture ex- ploration

Domaines: Informatique [cs]; Systèmes embarqués

C Ferdinand, R Heckmann, D Kästner, K Richter, N Feiertag, et al.. Integration of Code-Level and System-Level Timing Analysis for Early Architecture Exploration and Reliable Timing Verification. ERTS2 2010, Embedded Real Time Software & Systems, May 2010, Toulouse, France. ⟨hal-02264350⟩