A 2.5μW 0.0067mm 2 automatic back-biasing compensation unit achieving 50% leakage reduction in FDSOI 28nm over 0.35-to-1V VDD range

Anthony Quelen (1) , Gaël Pillonnet (1) , Philippe Flatresse (2) , Edith Beigné (1)

1 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information
2 ST-CROLLES - STMicroelectronics [Crolles]

Achieving 50% Leakage Reduction in FDSOI 28nm over 0.35-1V VDD Range [Placeholder for Author List] [Placeholder for Affiliations] Worst-case design and post silicon tuning are well-established digital design practices reducing timing violations in presence of process, temperature, aging and voltage variations but they suffer from extra power consumption due to overdesign [1]. Adaptive voltage scaling (AVS) [2] and body bias modulation [1] are well-known strategies to dynamically ensure that the digital core can operate at a targeted frequency, even in the presence of delay degradation due to variations. In a multiple voltage islands context, AVS requires many integrated supply generators such as switched capacitor converters that need to be controlled accurately. Also, for a fine-grain compensation, level shifters are required impacting a lot the circuit performances. As FDSOI technology offers the ability of adjusting the transistor speed through high sensitivity (85mV/VBB) VTH tuning by acting on buried Nwell (NW) and Pwell (PW) voltages, back biasing generators have been investigated [3-5]. However, they require an external controller to reach the optimal Back Bias (BB) voltages (no self-adjustment) [3-4] and [5] has a non-negligible area overhead for sub-mm 2 digital core for a narrow compensation range limited to 0.35-0.45V VDD. We therefore propose a variation-aware BB Compensation unit (BBC) which dynamically self-adjusts the N-and P-MOS transistors BB voltages to maintain the target frequency with low-latency tuning (100µs) across wide ranges of supply voltage (0.35-1V) and temperature (-40-125°C). The very low reported area of 0.0067mm 2 makes it affordable for a small digital core area (0.1-2mm 2). Requiring only a reference frequency signal FTGT, the proposed self-operating BBC exhibits 2.5µW quiescent current without any external component. Compared to worst-case design strategy, BBC brings up to 50% leakage reduction @0.45VDD@120°C and reduces the energy per cycle up to 32% compared to worst case design. Providing a continuous BB voltage adjustment (continuous VTH tuning), the target frequency is maintained within a +3.5% accuracy.

Domaines: Micro et nanotechnologies/Microélectronique

Anthony Quelen, Gaël Pillonnet, Philippe Flatresse, Edith Beigné. A 2.5μW 0.0067mm 2 automatic back-biasing compensation unit achieving 50% leakage reduction in FDSOI 28nm over 0.35-to-1V VDD range. 2018 IEEE International Solid-State Circuits Conference (ISSCC), Feb 2018, San Francisco, United States. ⟨10.1109/ISSCC.2018.8310305⟩. ⟨hal-01887173⟩