J. Balasch, B. Gierlichs, and I. Verbauwhede, An In-depth and Black-box Characterization of the Effects of Clock Glitches on 8-bit MCUs, 2011 Workshop on Fault Diagnosis and Tolerance in Cryptography
DOI : 10.1109/FDTC.2011.9

]. K. Bigou, ´ Etude théorique et implantation matérielle d'unités de calcul en représentation modulaire des nombres pour la cryptographie sur courbes elliptiques, 2014.

K. Bigou and A. Tisserand, Improving Modular Inversion in RNS Using the Plus-Minus Method
DOI : 10.1007/978-3-642-40349-1_14
URL : https://hal.archives-ouvertes.fr/hal-00825745

K. Bigou and A. Tisserand, RNS modular multiplication through reduced base extensions, 2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors
DOI : 10.1109/ASAP.2014.6868631
URL : https://hal.archives-ouvertes.fr/hal-01010961

K. Bigou and A. Tisserand, Single Base Modular Multiplication for Efficient Hardware RNS Implementations of ECC
DOI : 10.1007/978-3-662-48324-4_7
URL : https://hal.archives-ouvertes.fr/hal-01199155

K. Bigou and A. Tisserand, Hybrid Position-Residues Number System, 2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH)
DOI : 10.1109/ARITH.2016.15
URL : https://hal.archives-ouvertes.fr/hal-01314232

T. Chabrier, D. Pamula, and A. Tisserand, Hardware implementation of DBNS recoding for ECC processor, 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers
DOI : 10.1109/ACSSC.2010.5757580
URL : https://hal.archives-ouvertes.fr/inria-00536587

S. Endo, T. Sugawara, N. Homma, T. Aoki, and A. Satoh, An on-chip glitchy-clock generator for testing fault injection attacks, Journal of Cryptographic Engineering, vol.59, issue.6, pp.265-270, 2011.
DOI : 10.1109/TC.2009.176

N. Moro, A. Dehbaoui, K. Heydemann, B. Robisson, and E. Encrenaz, Electromagnetic fault injection: Towards a fault model on a 32
URL : https://hal.archives-ouvertes.fr/emse-00871218

]. D. Pamula, Arithmetic Operators on GF(2 m ) for Cryptographic Applications: Performance -Power Consumption -Security Tradeoffs, 2012.
URL : https://hal.archives-ouvertes.fr/tel-00767537

D. Pamula, E. Hrynkiewicz, and A. Tisserand, Analysis of GF(2 233 ) multipliers regarding elliptic curve cryptosystem applications m ) finite-field multipliers with reduced activity variations, 11th IFAC/IEEE International Conference on Programmable Devices and Embedded Systems (PDeS) 4th International Workshop on the Arithmetic of Finite Fields, pp.271-276, 2012.

D. Pamula and A. Tisserand, Fast and Secure Finite Field Multipliers, 2015 Euromicro Conference on Digital System Design
DOI : 10.1109/DSD.2015.46
URL : https://hal.archives-ouvertes.fr/hal-01169851

R. L. Rivest, A. Shamir, and L. Adleman, A method for obtaining digital signatures and public-key cryptosystems, Communications of the ACM, vol.21, issue.2, pp.120-126, 1978.
DOI : 10.1145/359340.359342
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.40.5588

J. Schmidt and C. Herbst, A Practical Fault Attack on Square and Multiply, 2008 5th Workshop on Fault Diagnosis and Tolerance in Cryptography
DOI : 10.1109/FDTC.2008.10

A. Tisserand, CNRS ? Lab-STICC. Embedding Crypto in SoCs: Threats and Protections 61, p.62