Effect of CMOS Technology Scaling on Fully-Integrated Power Supply Efficiency

Gaël Pillonnet (1) , Nicolas Jeanniot (1)

1 CEA - Commissariat à l'énergie atomique et aux énergies alternatives

Integrating a power supply in the same die as the powered circuits is an appropriate solution for granular, fine and fast power management. To allow same-die co-integration, fully integrated DC-DC converters designed in the latest CMOS technologies have been greatly studied by academics and industrialists in the last decade. However, there is little study concerning the effects of the CMOS scaling on these particular circuits. To show the trends, this paper compares the achievable efficiencies of the 2:1 switched capacitor DC-DC converter topology under the same constraints in 65, 130 and 350nm bulk CMOS nodes and 28nm in bulk and FDSOI technologies with various capacitor options.

Mots clés: Fully-integrated power supply; switched capacitor converter; on-chip voltage regulator; power management scaling.

Domaines: Electronique

Gaël Pillonnet, Nicolas Jeanniot. Effect of CMOS Technology Scaling on Fully-Integrated Power Supply Efficiency. 9th International Conference on Integrated Power Electronics Systems (CIPS 2016), Mar 2016, Nuremberg, Germany. ⟨hal-01348477⟩