Formal Specs Verifier ATG: a Tool for Model-based Generation of High Coverage Test Suites - Archive ouverte HAL
Communication Dans Un Congrès Année : 2016

Formal Specs Verifier ATG: a Tool for Model-based Generation of High Coverage Test Suites

Résumé

In this paper we describe Formal Specs Verifier Automatic Test Generation, a tool generating high coverage test suites for embedded systems. Our tool implements a test case synthesis algorithm using a combination of model checking and optimization techniques starting from a Simulink/Stateflow model of the System Under Test. The main contributions of this paper are the following: we (1) give an extended description of our test generation algorithm, (2) describe the algorithm implementation as part of the Formal Specs Verifier framework, (3) present a concrete application of the tool to a cruise control case study and discuss experimental results comparing our algorithm with a state-of-the art COTS tool.
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Dates et versions

hal-01289412 , version 1 (16-03-2016)

Identifiants

  • HAL Id : hal-01289412 , version 1

Citer

Orlando Ferrante, Marco Marazza, Alberto Ferrari. Formal Specs Verifier ATG: a Tool for Model-based Generation of High Coverage Test Suites. 8th European Congress on Embedded Real Time Software and Systems (ERTS 2016), Jan 2016, TOULOUSE, France. ⟨hal-01289412⟩

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