Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring

Divya Arora (1) , Srivaths Ravi (2) , Anand Raghunathan (2) , Niraj K. Jha (1)

1 EE - Department of Electrical Engineering [Princeton]
2 NEC Laboratories America, Princeton

Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in "trusted" software that they execute. Security attacks exploit these vulnerabilities to trigger unintended program behavior, such as the leakage of sensitive data or the execution of malicious code. In this work, we present a hardware-assisted paradigm to enhance embedded system security by detecting and preventing unintended program behavior. Specifically, we extract properties of an embedded program through static program analysis, and use them as the bases for enforcing permissible program behavior in real-time as the program executes. We present an architecture for hardware-assisted run-time monitoring, wherein the embedded processor is augmented with a hardware monitor that observes the processor's dynamic execution trace, checks whether the execution trace falls within the allowed program behavior, and flags any deviations from the expected behavior to trigger appropriate response mechanisms. We present properties that can be used to capture permissible program behavior at different levels of granularity within a program, namely inter-procedural control flow, intra-procedural control flow, and instruction stream integrity. We also present a systematic methodology to design application-specific hardware monitors for any given embedded program. We have evaluated the hardware requirements and performance of the proposed architecture for several embedded software benchmarks. Hardware implementations using a commercial design flow, and architectural simulations using the SimpleScalar framework, indicate that the proposed technique can thwart several common software and physical attacks, facilitating secure program execution with minimal overheads.

Domaines: Architectures Matérielles [cs.AR]; Electronique

Divya Arora, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha. Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring. DATE'05, Mar 2005, Munich, Germany. pp.178-183. ⟨hal-00181513⟩