A unified hardware/software co-synthesis solution for signal processing systems

Endri Bezati (1) , Hervé Yviquel (2) , Mickaël Raulet (3) , Marco Mattavelli (1)

1 EPFL - Ecole Polytechnique Fédérale de Lausanne
2 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
3 IETR - Institut d'Electronique et de Télécommunications de Rennes

This paper presents a methodology to specify from a high-level data-flow description an application for both hardware and software synthesis. Firstly, an introduction to RVC-Cal data-flow programming and Orcc framework is presented. Furthermore, an analysis of a close to gate intermediate representation (XLIM) is bestowed. As a proof of concept a JPEG codec was written purely in RVC-Cal to test the co-synthesis tools and then an analysis of the generated hardware and software results are given. Our experience shows that using RVC-Cal can unify the process of creating the same application for software and hardware without modifying a single source code for each solution.

Mots clés: JPEG codec; Orcc framework; RVC-Cal data-flow programming; XLIM; hardware synthesis; hardware/software co-synthesis; high-level data-flow description; signal processing systems; single source code; software synthesis; hardware-software codesign; signal processing equipment

Domaines: Systèmes embarqués

Endri Bezati, Hervé Yviquel, Mickaël Raulet, Marco Mattavelli. A unified hardware/software co-synthesis solution for signal processing systems. Design and Architectures for Signal and Image Processing (DASIP), 2011 Conference on, 2011, France. pp.1 -6, ⟨10.1109/DASIP.2011.6136877⟩. ⟨hal-00717244⟩