| HAL : hal-00716051, version 1 |
| Fiche détaillée | Récupérer au format |
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| DAC, San Francisco : États-Unis (2012) |
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| Co-Simulation of a SystemC TLM Virtual Platform with a Power Simulator at the Architectural Level: Case of a Set-Top Box |
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| Jérôme Cornet 1Laurent Maillet-Contoz 1 |
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| (07/06/2012) |
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| The ability to perform power estimation early in the design flow is becoming more and more critical as power optimization requirements grow. For now, standalone power simulators allow such estimation, based on typical stimuli described in a use-case scenario. We propose a co-simulation of SystemC TLM platforms with a Power model. This way, the Power model benefits from more realistic stimuli. In addition, it is possible to provide real-time information from the Power model back to the SystemC TLM simulation, such as temperature values. |
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| 1 : | STMicroelectronics (Grenoble) (ST-GRENOBLE) |
| STMicroelectronics | |
| 2 : | Docea Power |
| Entreprise privée | |
| 3 : | Docea Power |
| Entreprise privée | |
| 4 : | VERIMAG (VERIMAG - IMAG) |
| CNRS : UMR5104 – Université Joseph Fourier - Grenoble I – Institut National Polytechnique de Grenoble (INPG) | |
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| Domaine | : | Informatique/Modélisation et simulation Informatique/Multimédia |
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| power estimation – temperature – systemc – transaction-level modeling |
| hal-00716051, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00716051 | |
| oai:hal.archives-ouvertes.fr:hal-00716051 | |
| Contributeur : Matthieu Moy | |
| Soumis le : Lundi 9 Juillet 2012, 17:22:53 | |
| Dernière modification le : Lundi 9 Juillet 2012, 17:38:38 | |