A Real-Time Architecture Design Language for Multi-Rate Embedded Control Systems

Julien Forget (1) , Frédéric Boniol (1, 2) , David Lesens (3) , Claire Pagetti (1)

1 ONERA - The French Aerospace Lab [Toulouse]
2 ENSEEIHT - Ecole Nationale Supérieure d'Electrotechnique, d'Electronique, d'Informatique, d'Hydraulique et de Télécommunications
3 AST - Astrium Space Transportation

This paper presents a language dedicated to the description of the software architecture of complex embedded control systems. The language relies on the synchronous approach but extends it to support efficiently systems with multiple real-time constraints, such as deadline constraints or periodicity constraints. It provides a high-level of abstraction and benefits from the formal properties of synchronous languages. The language defines a small set of rate transition operators, which enable the description of user-defined deterministic multi-rate communication patterns between components of different rates. The compiler of the language automatically translates a program into a set of communicating real-time tasks implemented as concurrent C threads that can be executed on a standard real-time operating system.

Mots clés: Real-time systems; Synchronous; Scheduling; Compilation

Domaines: Systèmes embarqués; Informatique et langage [cs.CL]

Julien Forget, Frédéric Boniol, David Lesens, Claire Pagetti. A Real-Time Architecture Design Language for Multi-Rate Embedded Control Systems. 25th ACM Symposium On Applied Computing, Mar 2010, Sierre, Switzerland. pp.527--534. ⟨hal-00688490⟩