Towards Low-cost Soft Error Mitigation in SRAM-based FPGAs: a Case Study on AT40K
Résumé
Soft errors in the configuration memory of SRAM-based FPGAs cause significant and remanent application disturbances. Typical mitigation techniques induce large overheads in terms of resource usage and power consumption. We propose a new approach achieving efficient trade-offs between robustness and overheads, applied to the internal architecture of commercial AT40K devices.