HAL : hal-00455123, version 1

arXiv : 1002.1881

Fiche détaillée

Récupérer au format BibTeX - EndNote - TEI - RefWorks -

Eurasip Journal on Embedded Systems 2010 (2010) 542035

Evaluation and Design Space Exploration of a Time-Division Multiplexed NoC on FPGA for Image Analysis Applications

Linlin Zhang 1, Virginie Fresse 1, Mohammed Khalid 2, Dominique Houzet 3, Anne-Claire Legrand 1

SEMBA cluster Région Collaboration(s)

(2010)

The aim of this paper is to present an adaptable Fat Tree NoC architecture for Field Programmable Gate Array (FPGA) designed for image analysis applications. Traditional NoCs (Network on Chip) are not optimal for dataflow applications with large amount of data. On the opposite, point to point communications are designed from the algorithm requirements but they are expensives in terms of resource and wire. We propose a dedicated communication architecture for image analysis algorithms. This communication mechanism is a generic NoC infrastructure dedicated to dataflow image processing applications, mixing circuit-switching and packet-switching communications. The complete architecture integrates two dedicated communication architectures and reusable IP blocks. Communications are based on the NoC concept to support the high bandwidth required for a large number and type of data.

1 :	LAboratoire Hubert Curien (LAHC)
	CNRS : UMR5516 – Université Jean Monnet - Saint-Etienne
2 :	RCIM laboratory (RCIM)
	University of Windsor
3 :	Grenoble Images Parole Signal Automatique (GIPSA-lab)
	CNRS : UMR5216 – Université Joseph Fourier - Grenoble I – Université Pierre Mendès-France - Grenoble II – Université Stendhal - Grenoble III – Institut Polytechnique de Grenoble

Équipe de recherche : AGPIG

Domaine

:

Informatique/Architecture

hal-00455123, version 1

http://hal.archives-ouvertes.fr/hal-00455123

oai:hal.archives-ouvertes.fr:hal-00455123

Contributeur : Dominique Houzet <>

Soumis le : Mardi 9 Février 2010, 15:41:53

Dernière modification le : Mardi 25 Mai 2010, 09:00:30