 |
|
|
|
| HAL: hal-00325417, version 3 |
| Detailed view |  Export this paper |
|
|
| Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09., NICE : France (2009) |
|
|
| Available versions: | v1 (2008-09-30) | v2 (2008-11-18) | v3 (2009-02-04) |
|
|
|
|
| Successful Attack on an FPGA-based WDDL DES Cryptoprocessor Without Place and Route Constraints. |
|
|
| Laurent Sauvage 1Sylvain Guilley 1 |
|
|
| For the CALISSON collaboration(s) |
|
|
| (2009-06-23) |
|
|
|
| In this paper, we propose a preprocessing method to improve Side Channel Attacks (SCAs) on Dual-rail with Precharge Logic (DPL) countermeasure family. The strength of our method is that it uses intrinsic characteristics of the countermeasure: classical methods fail when the countermeasure is perfect, whereas our method still works and enables us to perform advanced attacks. We have experimentally validated the proposed method by attacking a DES cryptoprocessor embedded in a Field Programmable Gates Array (FPGA), and protected by the Wave Dynamic Differential Logic (WDDL) countermeasure. This successful attack, unambiguous as the full key is retrieved, is the first to be reported. |
|
|
|
|
|
|
|
|
|
|
|
| 1: | Laboratoire traitement et communication de l'information (LTCI) |
|
|
|
CNRS : UMR5141 – Institut Télécom – Télécom ParisTech |
|
|
|
|
|
|
|
|
|
| Subject | : | Engineering Sciences/Micro and nanotechnologies/Microelectronics |
|
|
| Side-Channel Analysis (SCA) – Differential Power Analysis (DPA) – ElectroMagnetic Analysis (EMA) – Dual-rail with Precharge Logic (DPL) – Wave Dynamic Differential Logic (WDDL) – Field Programmable Gates Array (FPGA). |
|
|
|
| Attached file list to this document: | |||||
|
|||||
|
|
|
| hal-00325417, version 3 | |
| http://hal.archives-ouvertes.fr/hal-00325417/en/ | |
| oai:hal.archives-ouvertes.fr:hal-00325417_v3 | |
| From: Laurent Sauvage | |
| Submitted on: Monday, 26 January 2009 12:29:37 | |
| Updated on: Friday, 8 January 2010 16:25:47 | |
