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Communication Dans Un Congrès Année : 2005

Reconfigurable Elliptic Curve Cryptosystems on a Chip

Résumé

This paper presents a System-on-a-Chip (SoC) architecture for Elliptic Curve Cryptosystems (ECC) which targets reconfigurable hardware. A four-level partitioning scheme is described for exploring the area and speed trade-offs. A design generator is used to generate parameterisable building blocks for the configurable SoC architecture. A secure web server, which runs on a reconfigurable soft-processor and an embedded hard-processor, shows over 2000 times speedup when the computationally-intensive operations run on the customised building blocks. The embedded on-chip timer block gives accurate performance information. The design factors of configurable SoC architectures are also discussed and evaluated.
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Dates et versions

hal-00181637 , version 1 (24-10-2007)

Identifiants

  • HAL Id : hal-00181637 , version 1

Citer

Ray C. C. Cheung, Wayne Luk, Peter Y. K. Cheung. Reconfigurable Elliptic Curve Cryptosystems on a Chip. DATE'05, Mar 2005, Munich, Germany. pp.24-29. ⟨hal-00181637⟩

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