.. Analyse-d-'accessibilité-pour-les-invariants, 104 7.2.1 Quelques modèles arborescents, 109 7.2.2 Quelques modèles de réseaux de Petri . . . . . . . . . . . . . 111

. Trss, FTRSs et EFTRSs sur des modèles arborescents, p.125

. Testvar, T est (a==b)? (x) ? T est (a==i)? (T est (b==i)? (x)) pour tout i ? DOM (a) ? DOM (b)

+. Value, Set a++ (y)), Set a++ (b(x, y)) ? b(Set a++ (x), y), Set a++ (a(x, y)) ? a(T estChange i?i+1 (x), y) pour tout i

?. Value, Set a?? (y)), Set a?? (b(x, y)) ? b(Set a?? (x), y), Set a?? (a(x, y)) ? a(T estChange i?i?1 (x), y) pour tout i

=. Setvar-a, Set a=b (x) ? Set a=i (T est (b==i)? (x)) pour tout i ? DOM (b)

<. Permute-a, Set a<?>b (x) ? Set b=i (Set a=b (T est (a==i)? (x))) pour tout i ? DOM (a)

=. Setvar-a, ?. Op-c-où-op, ?. {+, *. , and /. }. , Set a=(b op c) (x) ? Set a=(i op j) (T est (b==i)? (T est (c==j)? (x))) pour tout i ? DOM (b) et j ? DOM (c)

]. P. Abdulla, B. Jonsson, P. Mahata, and J. , Regular Tree Model Checking, CAV'02, pp.452466-452490, 2002.
DOI : 10.1007/3-540-45657-0_47
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.12.7184

]. P. Abdulla, A. Legay, J. Orso, and A. Rezine, Regular Tree Model Checking, p.85, 2006.
DOI : 10.1007/3-540-45657-0_47
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.12.7184

]. F. Baader and T. Nipkow, Term rewriting and all that, p.18, 1998.

]. R. Bahar, E. A. Frohm, C. M. Gaona, G. D. Hachtel, E. Macii et al., Algebraic decision diagrams and their applications, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD), pp.171206-171220, 1997.
DOI : 10.1109/ICCAD.1993.580054
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.47.2128

E. Balland, P. Brauner, R. Kopetz, P. Moreau, and A. Reilles, Tom: Piggybacking Rewriting on Java, Conference on Rewriting Techniques and Applications -RTA'07 Proceedings of the 18th Conference on Rewriting Techniques and Applications, pp.3647-3653, 2007.
DOI : 10.1007/978-3-540-73449-9_5
URL : https://hal.archives-ouvertes.fr/inria-00142045

]. Y. Boichut, T. Genet, T. Jensen, and L. L. Roux, Rewriting Approximations for Fast Prototyping of Static Analyzers, Proceedings of the 18th Conference on Rewriting Techniques and Applications, pp.4862-4892, 2007.
DOI : 10.1007/978-3-540-73449-9_6
URL : https://hal.archives-ouvertes.fr/hal-00463418

Y. Boichut, P. Heam, and O. Kouchnarenko, Approximation based tree regular model checking, Nordic Journal of Computing, vol.14, issue.125, pp.216241-131, 2008.
URL : https://hal.archives-ouvertes.fr/inria-00429345

A. Boua-jjani, B. Jonsson, M. Nilsson, and T. Touili, Regular Model Checking, CAV'00, 2000.

]. A. Bouajjani and T. Touili, Extrapolating Tree Transformations, 2002.
DOI : 10.1007/3-540-45657-0_46
URL : https://hal.archives-ouvertes.fr/hal-00161115

F. Bibliographie, J. Bréant, F. Couvreur, F. Gilliers, I. Kordon et al., Modeling and verifying behavioral aspects. In Formal methods for embedded distributed systems : how to master the complexity, pp.171211-145, 2004.

]. R. Bryant, Graph-Based Algorithms for Boolean Function Manipulation, IEEE Transactions on Computers, vol.35, issue.8, pp.677691-69, 1986.
DOI : 10.1109/TC.1986.1676819

]. R. Bryant, Symbolic Boolean manipulation with ordered binarydecision diagrams, ACM Comput. Surv, vol.24, issue.13, pp.293318-69, 1992.
DOI : 10.1145/136035.136043
URL : http://akebono.stanford.edu/users/nanni/courses/EE318/bryant92.pdf

J. R. Burch, E. M. Clarke, and K. L. Mcmillan, Symbolic Model Checking : 10 20 States and Beyond. Information and Computation (Special issue for best papers from LICS90, pp.153181-153196, 1992.

]. G. Ciardo, G. Lüttgen, and R. Siminiceanu, Ecient Symbolic State- Space Construction for Asynchronous Systems, Lecture Notes in Computer Science, vol.1825, pp.103122-103136, 2000.

]. G. Ciardo, R. L. Jones, I. Marmorstein, R. M. , A. S. Miner et al., SMART : Stochastic Model-checking Analyzer for Reliability and Timing, DSN, page 545, 2002.

]. G. Ciardo and R. Siminiceanu, Using Edge-Valued Decision Diagrams for Symbolic Generation of Shortest Paths, FMCAD '02 : Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design, pp.256273-133, 2002.
DOI : 10.1007/3-540-36126-X_16

]. G. Ciardo, R. M. Marmorstein, and R. Siminiceanu, Saturation Unbound, TACAS, pp.379393-71, 2003.
DOI : 10.1007/3-540-36577-X_27

]. G. Ciardo and A. J. Yu, Saturation-Based Symbolic Reachability Analysis Using Conjunctive and Disjunctive Partitioning, CHARME, pp.146161-133, 2005.
DOI : 10.1007/11560548_13

]. G. Ciardo, R. Marmorstein, and R. Siminiceanu, The saturation algorithm for symbolic state-space exploration, International Journal on Software Tools for Technology Transfer, vol.8, issue.1, 2006.
DOI : 10.1007/s10009-005-0188-7

]. G. Ciardo, G. Lüttgen, and A. S. Miner, Exploiting interleaving semantics in symbolic state-space generation, Formal Methods in System Design, vol.15, issue.3, pp.63100-133, 2007.
DOI : 10.1007/s10703-006-0033-y

]. A. Cimatti, E. Clarke, E. Giunchiglia, F. Giunchiglia, M. Pistore et al., NuSMV Version 2 : An OpenSource Tool for Symbolic Model Checking, Proc. International Conference on Computer-Aided Verication, p.132, 2002.

M. Edmund, E. A. Clarke, A. P. Emerson, and . Sistla, Automatic Verication of Finite-State Concurrent Systems Using Temporal Logic Specications, ACM Trans. Program. Lang. Syst, vol.8, issue.11, pp.244263-244275, 1986.

]. E. Clarke, D. Long, and K. Mcmillan, Compositional model checking, [1989] Proceedings. Fourth Annual Symposium on Logic in Computer Science, pp.353362-353387, 1989.
DOI : 10.1109/LICS.1989.39190
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.111.7245

]. E. Clarke, O. Grumberg, and D. A. , Peled. Model checking, 2000.

]. M. Clavel, F. Durán, S. Eker, P. Lincoln, N. Martí-oliet et al., Maude: specification and programming in rewriting logic, Theoretical Computer Science, vol.285, issue.2, 2001.
DOI : 10.1016/S0304-3975(01)00359-0

]. Couvreur, On-the-y Verication of Linear Temporal Logic, 1999.

E. Couvreur, E. Encrenaz, D. Paviotadet, P. Poitrenaud, and . Wacrenier, Data Decision Diagrams for Petri Net Analysis, ICATPN, pp.1101-1115, 2002.
DOI : 10.1007/3-540-48068-4_8

]. Couvreur and D. Nguyen, Tree Data Decision Diagrams, 2008.
URL : https://hal.archives-ouvertes.fr/hal-00468333

I. Vecos, U. G. Leeds, J. Denker, C. Meseguer, and . Talcott, Protocol Specication and Analysis in Maude, Proc. 2nd WRLA Workshop, p.30, 1998.

]. N. Bibliographie, J. Dershowitz, and . Jouannaud, Handbook of theoretical computer science, volume B, chapitre 6 : Rewrite Systems, Also as : Research report 478, LRI. iv, pp.244320-244338, 1990.

]. D. Dill, Trace theory for automatic hierarchical verication of speedindependent circuits, p.25, 1989.

]. E. Emerson and E. Clarke, Characterizing correctness properties of parallel programs using xpoints, Automata, Languages and Programming, pp.169181-169193, 1980.

]. T. Genet and F. Klay, Rewriting for Cryptographic Protocol Verication, Proc. 17th CADE Conf., Pittsburgh (Pen., USA), volume 1831 of LNAI, 2000.

]. T. Genet, V. Viet-triem, and . Tong, Reachability Analysis of Term Rewriting Systems with Timbuk, Proc. 8th LPAR Conf., Havana (Cuba), volume 2250 of LNAI, pp.691702-691732, 2001.
DOI : 10.1007/3-540-45653-8_48
URL : https://hal.archives-ouvertes.fr/inria-00072321

]. T. Genet, Y. Tang-talpin, V. Viet-triem, and . Tong, Verication of Copy Protection Cryptographic Protocol using Approximations of Term Rewriting Systems, Proceedings of Workshop on Issues in the Theory of Security, p.30, 2003.

]. R. Gerth, D. Peled, M. Y. Vardi, and P. Wolper, Simple on-the-y automatic verication of linear temporal logic, PSTV, pp.318-329, 1995.

]. R. Gilleron and S. Tison, Regular Tree Languages and Rewrite Systems, Fundamenta Informaticae, vol.24, pp.157175-157193, 1995.
URL : https://hal.archives-ouvertes.fr/inria-00538882

]. F. Gilliers, J. Velu, and F. Kordon, Generation of distributed programs in their target execution environment, Proceedings. 15th IEEE International Workshop on Rapid System Prototyping, 2004., pp.127134-127149, 2004.
DOI : 10.1109/IWRSP.2004.1311107

]. S. Graf, B. Steen, and G. Lüttgen, Compositional Minimisation of Finite State Systems Using Interface Specications, Formal Asp. Comput, vol.8, issue.8, pp.607616-135, 1996.

]. A. Gupta and A. L. Fisher, Representation and symbolic manipulation of linearly inductive Boolean functions, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD), pp.111116-111130, 1993.
DOI : 10.1109/ICCAD.1993.580055

]. A. Gupta, Inductive Boolean Function Manipulation, p.14, 1994.

]. G. Holzmann, The model checker SPIN, IEEE Transactions on Software Engineering, vol.23, issue.5, 1986.
DOI : 10.1109/32.588521

]. G. Holzmann, Design and validation of computer protocols, 1991.

]. H. Hulgaard, P. F. Williams, and H. R. Andersen, Equivalence checking of combinational circuits using Boolean expression diagrams, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.18, issue.7, p.13, 1999.
DOI : 10.1109/43.771175

O. Kesten, M. Maler, A. Marcus, E. Pnueli, and . Shahar, Symbolic model checking with rich assertional languages, Theoretical Computer Science, vol.256, issue.1-2, pp.424435-83, 1997.
DOI : 10.1016/S0304-3975(00)00103-1

]. T. Kolks, B. Lin, and H. De-man, Sizing and Verication of Communication Buers for Communicating Processes, ICCAD'93, pp.660664-660678, 1993.

]. L. Mauborgne, Binary Decision Graphs, SAS'99, pp.101116-101130, 1999.
DOI : 10.1007/3-540-48294-6_7

]. L. Mauborgne, An Incremental Unique Representation for Regular Trees, Nordic Journal of Computing, vol.7, issue.4, pp.290311-290325, 2000.

]. S. Minato, N. Ishiura, and S. Yajima, Shared Binary Decision Diagrams with Attributed Edges for Ecient Boolean Function Manipulation, 1990.

]. A. Miner and G. Ciardo, Ecient Reachability Set Generation and Storage Using Decision Diagrams, Proceedings of the 20th International Conference on Application and Theory of Petri Nets, pp.625-639, 1999.
DOI : 10.1007/3-540-48745-x_2
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.19.7748

]. Nguyen, LfV, Language for Verication, Student session, 7th School on MOdelling and VErifying of parallel Processes, p.336341, 2006.

]. E. Bibliographie and . Ohlebusch, Advanced topics in term rewriting, 2002.

]. A. Pnueli, The temporal logic of programs, 18th Annual Symposium on Foundations of Computer Science (sfcs 1977), pp.4657-4665, 1977.
DOI : 10.1109/SFCS.1977.32

]. A. Sistla and E. M. Clarke, The complexity of propositional linear temporal logics, STOC '82 : Proceedings of the fourteenth annual ACM symposium on Theory of computing, pp.159168-159180, 1982.

A. Mieg, F. Hamez, and . Kordon, Building ecient model checkers using Hierarchical Set decidion diagrams and automatic saturation, Fundamenta Inforaticae Petri Nets, vol.1, issue.125, pp.71-133, 2008.

D. Mieg, A. Poitrenaud, F. Hamez, and . Kordon, Hierarchical Set Decision Diagrams and Regular Models, TACAS, p.115, 2009.
URL : https://hal.archives-ouvertes.fr/hal-01294397

]. M. Vardi and P. Wolper, Automata-Theoretic Techniques for Modal Logics of Programs, J. Comput. Syst. Sci, vol.32, issue.4, pp.183221-183230, 1986.

P. Wolper and B. Boigelot, Verifying systems with innite but regular state spaces, CAV'98, 1998.
DOI : 10.1007/bfb0028736
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.24.8097

]. H. Zantema, Term rewriting system, chapter termination, p.161, 2003.

. Dans-la-partie-expérimentale, nous avons comparé notre outil, d'une part avec des outils de ré-écriture tels que Timbuk, Maude et TOM, d'autre part avec des outils de vérication tels que SPIN, Nos benchmarks démontrent l'ecacité des systèmes fonctionnels élémentaires pour la vérication de modèles