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65nm CMOS SOI potentialities for millimeter wave wireless applications

Abstract : As the 65nm CMOS SOI technology was not initially developed for millimeter wave design, this work demonstrates the advantages of using this technology for applications at such high frequencies. The demonstration is focused on two parts. First active and passive devices are studied in order to evaluate the potentiality for low noise and high gain performances at millimeter frequencies. Different figures of merit are introduced for both actives and passives. Characterization and modeling techniques improvement are developed in this work. In a second part, reception millimeter wave building blocks are developed such as low noise amplifiers and mixers.
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Contributor : Baudouin Martineau Connect in order to contact the contributor
Submitted on : Wednesday, June 18, 2008 - 6:52:39 PM
Last modification on : Wednesday, March 23, 2022 - 3:50:22 PM
Long-term archiving on: : Friday, May 28, 2010 - 10:38:11 PM


  • HAL Id : tel-00288865, version 1


Baudouin Martineau. 65nm CMOS SOI potentialities for millimeter wave wireless applications. Micro and nanotechnologies/Microelectronics. Université des Sciences et Technologie de Lille - Lille I, 2008. English. ⟨tel-00288865⟩



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