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lirmm-01248589v1
Communication dans un congrès
Alessandro Magnani, M. De Magistris, Antonio Maffucci, Aida Todri-Sanial. A node clustering reduction scheme for power grids electrothermal analysisSPI: Signal and Power Integrity, May 2015, Berlin, Germany. Signal and Power Integrity (SPI), 2015 IEEE 19th Workshop on, pp.1-4, 2015, <10.1109/SaPIW.2015.7237399>
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lirmm-01248596v1
Communication dans un congrès
Yuanqing Cheng, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard et al. Power supply noise-aware workload assignments for homogeneous 3D MPSoCs with thermal considerationASP-DAC: Asia and South Pacific Design Automation Conference, Jan 2014, Singapore, Singapore. pp.544-549, 2014, Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific. <10.1109/ASPDAC.2014.6742948>
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lirmm-01248598v1
Communication dans un congrès
Imran Wali, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard et al. Protecting combinational logic in pipelined microprocessor cores against transient and permanent faultsDDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. Design and Diagnostics of Electronic Circuits Systems, 17th International Symposium on, pp.223-225, 2014, <10.1109/DDECS.2014.6868794>
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lirmm-01248597v1
Communication dans un congrès
Aymen Touati, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial et al. A Comprehensive Evaluation of Functional Programs for Power-Aware TestNATW: North Atlantic Test Workshop, May 2014, Johnson City, NY, United States. IEEE, Test Workshop (NATW), 2014 IEEE 23rd North Atlantic, pp.69-72, 2014, <10.1109/NATW.2014.23>
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lirmm-00805140v1
Communication dans un congrès
Leonardo Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial et al. Test Solution for Data Retention Faults in Low-Power SRAMsEDA Association. DATE: Design, Automation and Test in Europe, Mar 2013, Grenoble, France. Design, Automation & Test in Europe Conference & Exhibition, pp.442-447, 2013, <http://www.date-conference.com/>. <10.7873/DATE.2013.099>
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lirmm-00805143v1
Communication dans un congrès
Leonardo Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial et al. Low-power SRAMs Power Mode Control Logic: Failure Analysis and Test SolutionsITC'2012: International Test Conference, Nov 2012, Anaheim, CA, United States. IEEE, pp.1-10, 2012, <http://www.itctestweek.org/>. <10.1109/TEST.2012.6401578>
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lirmm-01248593v1
Communication dans un congrès
Xiaolong Zhang, Yuanqing Cheng, Weisheng Zhao, Youguang Zhang, Aida Todri-Sanial. Exploring potentials of perpendicular magnetic anisotropy STT-MRAM for cache designSolid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on, 2014, Unknown, Unknown or Invalid Region. pp.1-3, 2014, <10.1109/ICSICT.2014.7021342>
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lirmm-00818984v1
Communication dans un congrès
Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial, Arnaud Virazel. Why and How Controlling Power Consumption During Test: A SurveyATS: Asian Test Symposium, Nov 2012, Niigata, Japan. Test Symposium (ATS), 2012 IEEE 21st Asian, pp. 221-226, 2012, <http://aries3a.cse.kyutech.ac.jp/~ats12/>. <10.1109/ATS.2012.30>
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lirmm-00818977v1
Communication dans un congrès
Leonardo Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial et al. On the Reuse of Read and Write Assist Circuits to Improve Test Efficiency in Low-Power SRAMsITC: International Test conference, Sep 2013, Anaheim, CA, United States. pp.1-10, 2013, <http://www.itctestweek.org/>. <10.1109/TEST.2013.6651927>
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lirmm-01248628v1
Communication dans un congrès
Aida Todri-Sanial, Malgorzata Marek-Sadowska, François Maire, Christophe Matheron. A study of decoupling capacitor effectiveness in power and ground grid networksISQED: International Symposium on Quality Electronic Design, Mar 2009, San Jose, CA, United States. 10th International Symposium on Quality Electronic Design, pp.653-658, 2009, <10.1109/ISQED.2009.4810371>
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lirmm-01248590v1
Communication dans un congrès
Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri-Sanial, Arnaud Virazel et al. Test and diagnosis of power switchesDDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. Design and Diagnostics of Electronic Circuits Systems, 17th International Symposium on, pp.213-218, 2014, <10.1109/DDECS.2014.6868792>
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lirmm-00805123v1
Communication dans un congrès
Leonardo Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch et al. Failure Analysis and Test Solutions for Low-Power SRAMsATS: Asian Test Symposium, Nov 2011, New Delhi, India. 20th IEEE Asian Test Symposium, pp.459-460, 2011, <http://www.ecs.umass.edu/ece/ats11/>. <10.1109/ATS.2011.97>
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lirmm-00805366v1
Communication dans un congrès
Leonardo Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri-Sanial et al. A Built-in Scheme for Testing and Repairing Voltage Regulators of Low-Power SRAMsVTS: VLSI Test Symposium, Apr 2013, Berkeley, CA, United States. pp.1-6, 2013, VLSI Test Symposium (VTS), 2013 IEEE 31st. <http://www.tttc-vts.org/public_html/new/2013/index.php>. <10.1109/VTS.2013.6548894>
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lirmm-01248599v1
Communication dans un congrès
Anu Asokan, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard et al. Path delay test in the presence of multi-aggressor crosstalk, power supply noise and ground bounceDDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. IEEE, Design and Diagnostics of Electronic Circuits & Systems, 17th International Symposium on, pp.207-212, 2014, <10.1109/DDECS.2014.6868791>
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lirmm-01248601v1
Communication dans un congrès
Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri-Sanial, Arnaud Virazel et al. iBoX — Jitter based Power Supply Noise sensorETS: European Test Symposium, May 2014, Paderborn, United States. Test Symposium (ETS), 2014 19th IEEE European, pp.1-2, 2014, <10.1109/ETS.2014.6847830>
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lirmm-01248586v1
Communication dans un congrès
Bi Wu, Yuanqing Cheng, Ying Wang, Aida Todri-Sanial, Guangyu Sun et al. An architecture-level cache simulation framework supporting advanced PMA STT-MRAMNANOARCH: Nanoscale Architectures, Jun 2015, Boston, MA, United States. Nanoscale Architectures (NANOARCH), 2015 IEEE/ACM International Symposium on, pp.7-12, 2015, <10.1109/NANOARCH.2015.7180576>
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