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pastel-00002562v1  Thèse
Sylvain Guilley. Contre-mesures géométriques aux attaques exploitant les canaux cachés
domain_other. Télécom ParisTech, 2007. English
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hal-00325417v3  Communication dans un congrès
Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger, Yves Mathieu, Maxime Nassar. Successful Attack on an FPGA-based WDDL DES Cryptoprocessor Without Place and Route Constraints.
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09., Apr 2009, NICE, France. pp.640-645, 2009
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hal-00409024v1  Communication dans un congrès
Sylvain Guilley, Sumanta Chaudhuri, Laurent Sauvage, Tarik Graba, Jean-Luc Danger et al.  Shall we trust WDDL?
Springer. Future of Trust in Computing, Jun 2008, Berlin, Germany. Vieweg+Teubner, 2, pp.208-215, 2008, Subject Collection "Computer Science". <10.1007/978-3-8348-9324-6_22>
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hal-00259153v5  Communication dans un congrès
Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Tarik Graba, Yves Mathieu. Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs
IEEE Press. Secure System Integration and Reliability Improvement, Jul 2008, Yokohama, Japan. IEEE, pp.16-23, 2008, IEEE Reliability &IEEE Systems, Man and Cybernetics Society. <10.1109/SSIRI.2008.31>
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hal-00425523v4  Communication dans un congrès
Houssem Maghrebi, Jean-Luc Danger, Florent Flament, Sylvain Guilley, Laurent Sauvage. Evaluation of Countermeasure Implementations Based on Boolean Masking to Thwart Side-Channel Attacks
SCS, Nov 2009, Jerba, Tunisia. IEEE, 6 p., 2009, <10.1109/ICSCS.2009.5412597>
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hal-00320425v2  Communication dans un congrès
Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Philippe Hoogvorst. Area Optimization of Cryptographic Co-Processors Implemented in Dual-Rail with Precharge Positive Logic
International Conference on Field Programmable Logic and Applications, Sep 2008, Heidelberg, Germany. IEEE-CS, pp.161-166, 2008, <10.1109/FPL.2008.4629925>
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hal-01362457v1  Poster
Margaux Dugardin, Louiza Papachristodoulou, Zakaria Najm, Lejla Batina, Jean-Christophe Courrège et al.  Power and Electromagnetic Analysis for Template Attacks
TRUDEVICE, Mar 2015, Grenoble, France. 2015, <http://trudevice.com/category/events/>
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hal-00339858v1  Pré-publication, Document de travail
Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger, Yves Mathieu, Maxime Nassar. Successful Attack on an FPGA-based Automatically Placed and Routed WDDL+ Crypto Processor.
2008
hal-00934336v1  Rapport
Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, Cédric Murdica, David Naccache. Dynamic Countermeasure Against the Zero Power Analysis
[Research Report] IACR Cryptology ePrint Archive 2013: 764 (2013), 2013
hal-00799421v1  Communication dans un congrès
Cedric Murdica, Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, David Naccache. Low-Cost Countermeasure against RPA
CARDIS 2012, Nov 2012, Graz, Austria. pp.106-122, 2013
hal-00686565v1  Communication dans un congrès
Cedric Murdica, Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst, David Naccache. Same Values Power Analysis Using Special Points on Elliptic Curves
Schindler, Werner; Huss, Sorin;. COSADE 2012 - Third International Workshop Constructive Side-Channel Analysis and Secure Design, May 2012, Darmstadt, Germany. 7275, pp.Cédric Murdica, 2012, Lecture Notes in Computer Science. <10.1007/978-3-642-29912-4_14>
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hal-00618482v2  Communication dans un congrès
Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger, Florent Flament. Entropy-based Power Attack
IEEE. Hardware-Oriented Security and Trust, Jun 2010, Anaheim, CA, United States. IEEE, pp.1-6, 2010, Computer Society. <10.1109/HST.2010.5513124>
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hal-00411843v3  Communication dans un congrès
Shivam Bhasin, Jean-Luc Danger, Florent Flament, Tarik Graba, Sylvain Guilley et al.  Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow
IEEE Computer Society. ReConFig, Dec 2009, Cancún, Mexico. IEEE, pp.213 - 218, 2009, <10.1109/ReConFig.2009.50>
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hal-00311431v1  Communication dans un congrès
Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane, Renaud Pacalet. Silicon-level Solutions to Counteract Passive and Active Attacks
IEEE-CS. FDTC, Aug 2008, Washington, DC, United States. IEEE-CS, pp.3-17, 2008, <10.1109/FDTC.2008.18>
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hal-00283405v5  Communication dans un congrès
Sylvain Guilley, Florent Flament, Yves Mathieu, Renaud Pacalet. Security Evaluation of a Balanced Quasi-Delay Insensitive Library (SecLib)
IEEE Press. Conference on Design of Circuits and Integrated Systems, Nov 2008, Grenoble, France. 6 p., ISBN: 978-2-84813-124-5, 2008
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hal-00666337v1  Communication dans un congrès
Maxime Nassar, Youssef Souissi, Sylvain Guilley, Jean-Luc Danger. RSM: a Small and Fast Countermeasure for AES, Secure against 1st and 2nd-order Zero-Offset SCAs
Design Automation and Test in Europe, Mar 2012, Desden, Germany. pp.1173-1178, 2012
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hal-01534305v1  Communication dans un congrès
Youssef Souissi, Nicolas Debande, Sami Mekki, Sylvain Guilley, Ali Maalaoui et al.  On the Optimality of Correlation Power Attack on Embedded Cryptographic Systems
Ioannis Askoxylakis; Henrich C. Pöhls; Joachim Posegga. 6th International Workshop on Information Security Theory and Practice (WISTP), Jun 2012, Egham, United Kingdom. Springer, Lecture Notes in Computer Science, LNCS-7322, pp.169-178, 2012, Information Security Theory and Practice. Security, Privacy and Trust in Computing Systems and Ambient Intelligent Ecosystems
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hal-00826618v6  Communication dans un congrès
Claude Carlet, Sylvain Guilley. Side-Channel Indistinguishability
HASP, Jun 2013, Tel Aviv, Israel. ACM, pp.9:1-9:8, 2013, <10.1145/2487726.2487735>

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