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lirmm-01272986v1  Article dans une revue
Miroslav ValkaAlberto BosioLuigi DililloPatrick GirardArnaud Virazel et al.  Design for Test and Diagnosis of Power Switches
Journal of Circuits, Systems, and Computers, World Scientific Publishing, 2016, 25 (3), pp.1640013. <10.1142/S0218126616400132>
lirmm-01248596v1  Communication dans un congrès
Yuanqing ChengAida Todri-SanialAlberto BosioLuigi DililloPatrick Girard et al.  Power supply noise-aware workload assignments for homogeneous 3D MPSoCs with thermal consideration
ASP-DAC: Asia and South Pacific Design Automation Conference, Jan 2014, Singapore, Singapore. pp.544-549, 2014, Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific. <10.1109/ASPDAC.2014.6742948>
lirmm-01248598v1  Communication dans un congrès
Imran WaliArnaud VirazelAlberto BosioLuigi DililloPatrick Girard et al.  Protecting combinational logic in pipelined microprocessor cores against transient and permanent faults
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. Design and Diagnostics of Electronic Circuits Systems, 17th International Symposium on, pp.223-225, 2014, <10.1109/DDECS.2014.6868794>
lirmm-01248597v1  Communication dans un congrès
Aymen TouatiAlberto BosioLuigi DililloPatrick GirardAida Todri-Sanial et al.  A Comprehensive Evaluation of Functional Programs for Power-Aware Test
NATW: North Atlantic Test Workshop, May 2014, Johnson City, NY, United States. IEEE, Test Workshop (NATW), 2014 IEEE 23rd North Atlantic, pp.69-72, 2014, <10.1109/NATW.2014.23>
lirmm-01248617v1  Communication dans un congrès
Yuanqing ChengAida Todri-SanialAlberto BosioLuigi DililloPatrick Girard et al.  A novel method to mitigate TSV electromigration for 3D ICs
ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Aug 2013, Natal, Brazil. pp.121-126, 2013, <10.1109/ISVLSI.2013.6654633>
lirmm-00805140v1  Communication dans un congrès
Leonardo ZordanAlberto BosioLuigi DililloPatrick GirardAida Todri-Sanial et al.  Test Solution for Data Retention Faults in Low-Power SRAMs
EDA Association. DATE: Design, Automation and Test in Europe, Mar 2013, Grenoble, France. Design, Automation & Test in Europe Conference & Exhibition, pp.442-447, 2013, <http://www.date-conference.com/>. <10.7873/DATE.2013.099>
lirmm-00805143v1  Communication dans un congrès
Leonardo ZordanAlberto BosioLuigi DililloPatrick GirardAida Todri-Sanial et al.  Low-power SRAMs Power Mode Control Logic: Failure Analysis and Test Solutions
ITC'2012: International Test Conference, Nov 2012, Anaheim, CA, United States. IEEE, pp.1-10, 2012, <http://www.itctestweek.org/>. <10.1109/TEST.2012.6401578>
lirmm-00818984v1  Communication dans un congrès
Alberto BosioLuigi DililloPatrick GirardAida Todri-SanialArnaud VirazelWhy and How Controlling Power Consumption During Test: A Survey
ATS: Asian Test Symposium, Nov 2012, Niigata, Japan. Test Symposium (ATS), 2012 IEEE 21st Asian, pp. 221-226, 2012, <http://aries3a.cse.kyutech.ac.jp/~ats12/>. <10.1109/ATS.2012.30>
lirmm-01457424v1  Communication dans un congrès
Alberto BosioLuigi DililloPatrick GirardArnaud VirazelLeonardo B. ZordanAn effective BIST architecture for power-gating mechanisms in low-power SRAMs
ISQED: International Symposium on Quality Electronic Design, Mar 2016, Santa Clara, CA, United States. IEEE, 17th International Symposium on Quality Electronic Design, pp.185-191, 2016, <http://www.isqed.org/English/Archives/2016/>. <10.1109/ISQED.2016.7479198>
lirmm-01248590v1  Communication dans un congrès
Miroslav ValkaAlberto BosioLuigi DililloAida Todri-SanialArnaud Virazel et al.  Test and diagnosis of power switches
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. Design and Diagnostics of Electronic Circuits Systems, 17th International Symposium on, pp.213-218, 2014, <10.1109/DDECS.2014.6868792>
lirmm-00805123v1  Communication dans un congrès
Leonardo ZordanAlberto BosioLuigi DililloPatrick GirardSerge Pravossoudovitch et al.  Failure Analysis and Test Solutions for Low-Power SRAMs
ATS: Asian Test Symposium, Nov 2011, New Delhi, India. 20th IEEE Asian Test Symposium, pp.459-460, 2011, <http://www.ecs.umass.edu/ece/ats11/>. <10.1109/ATS.2011.97>
lirmm-00805366v1  Communication dans un congrès
Leonardo ZordanAlberto BosioLuigi DililloPatrick GirardAida Todri-Sanial et al.  A Built-in Scheme for Testing and Repairing Voltage Regulators of Low-Power SRAMs
VTS: VLSI Test Symposium, Apr 2013, Berkeley, CA, United States. pp.1-6, 2013, VLSI Test Symposium (VTS), 2013 IEEE 31st. <http://www.tttc-vts.org/public_html/new/2013/index.php>. <10.1109/VTS.2013.6548894>
lirmm-00805374v1  Communication dans un congrès
Leonardo ZordanAlberto BosioLuigi DililloPatrick GirardAida Todri-Sanial et al.  Defect Analysis in Power Mode Control Logic of Low-Power SRAMs
ETS: European Test symposium, May 2012, Annecy, France. 17th IEEE European Test Symposium, 2012, <http://ets2012.imag.fr/>. <10.1109/ETS.2012.6233033>
lirmm-01248599v1  Communication dans un congrès
Anu AsokanAida Todri-SanialAlberto BosioLuigi DililloPatrick Girard et al.  Path delay test in the presence of multi-aggressor crosstalk, power supply noise and ground bounce
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. IEEE, Design and Diagnostics of Electronic Circuits & Systems, 17th International Symposium on, pp.207-212, 2014, <10.1109/DDECS.2014.6868791>
lirmm-01248601v1  Communication dans un congrès
Miroslav ValkaAlberto BosioLuigi DililloAida Todri-SanialArnaud Virazel et al.  iBoX — Jitter based Power Supply Noise sensor
ETS: European Test Symposium, May 2014, Paderborn, United States. Test Symposium (ETS), 2014 19th IEEE European, pp.1-2, 2014, <10.1109/ETS.2014.6847830>
lirmm-01272937v1  Communication dans un congrès
Aymen TouatiAlberto BosioLuigi DililloPatrick GirardArnaud Virazel et al.  Exploring the impact of functional test programs re-used for power-aware testing
DATE: Design, Automation and Test in Europe, Mar 2015, Grenoble, France. pp.1277-1280, 2015
lirmm-01272684v1  Communication dans un congrès
Miroslav ValkaAlberto BosioLuigi DililloPatrick GirardArnaud Virazel et al.  Design-for-Diagnosis Architecture for Power Switches
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2015, Belgrade, Serbia. pp.43-48, 2015, <10.1109/DDECS.2015.18>
lirmm-00805339v1  Communication dans un congrès
Alessio GriffoniJeroen Van DuivenbodeDimitri LintenEddy SimoenPaolo Rech et al.  Neutron-Induced Failure in Super-Junction, IGBT, and SiC Power Devices
RADECS: European Conference on Radiation and Its Effects on Components and Systems, Sep 2011, Seville, Spain. IEEE, pp.226-231, 2011, <http://www.radecs2011.org/>. <10.1109/RADECS.2011.6131395>
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lirmm-00806774v1  Article dans une revue
Aida Todri-SanialAlberto BosioLuigi DililloPatrick GirardArnaud VirazelUncorrelated Power Supply Noise and Ground Bounce Consideration for Test Pattern Generation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2013, 21 (5), pp.958-970. <10.1109/TVLSI.2012.2197427>
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lirmm-01255754v1  Article dans une revue
Aida Todri-SanialSandip KunduPatrick GirardAlberto BosioLuigi Dilillo et al.  Globally Constrained Locally Optimized 3-D Power Delivery Networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2014, 22 (10), pp.2131-2144. <10.1109/TVLSI.2013.2283800>
lirmm-00805039v1  Article dans une revue
Alessio GriffoniJeroen Van DuivenbodeDimitri LintenEddy SimoenPaolo Rech et al.  Neutron-Induced Failure in Silicon IGBTs, Silicon Super-Junction and SiC MOSFETs
IEEE Transactions on Nuclear Science, Institute of Electrical and Electronics Engineers, 2012, 59 (4), pp.866-871. <10.1109/TNS.2011.2180924>