Through-Silicon-Via Resistive-Open Defect Analysis

Carolina Momo Metzler (1) , Aida Todri-Sanial (2) , Alberto Bosio (2) , Luigi Dilillo (2) , Patrick Girard (2) , Arnaud Virazel (2)

1 LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
2 SysMIC - Conception et Test de Systèmes MICroélectroniques

Three-dimensional (3D) integration is a fast emerging technology that offers integration of high density, fast performance and heterogeneous circuits in a small footprint. Through-Silicon-Vias (TSVs) enable 3D integration by providing fast performance and short interconnects among tiers. However, they are also susceptible to defects that occur during manufacturing steps and cause crucial reliability issues. In this paper, we perform an analysis of resistive-open defects (ROD) on TSVs considering coupling effects (i.e. inductive and capacitive) and a wide frequency spectrum. Our experiments show that both substrate coupling and switching frequency can have a significant impact on weak open TSV behavior.

Domaines: Micro et nanotechnologies/Microélectronique

Carolina Momo Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. Through-Silicon-Via Resistive-Open Defect Analysis. ETS: European Test Symposium, May 2012, Annecy, France. ⟨10.1109/ETS.2012.6233037⟩. ⟨lirmm-00806848⟩