Neutron-Induced Multiple Bit Upsets on Two Commercial SRAMs Under Dynamic-Stress

Paolo Rech (1) , Jean-Marc J.-M. Galliere (1) , Patrick Girard (1) , Alessio Griffoni (2) , Jérôme Boch (3, 4) , Frédéric Wrobel (4, 3) , Frédéric Saigné (4, 3) , Luigi Dilillo (1)

1 SysMIC - Conception et Test de Systèmes MICroélectroniques
2 IMEC - IMEC
3 IES - Institut d’Electronique et des Systèmes
4 RADIAC - Radiations et composants

We investigate the occurrence of Multiple Bit Upsets in commercial SRAMs of 4 Mbits and 32 Mbits when irradiated with neutrons. The devices were irradiated at TSL facility with QMN beams of energies from 50 MeV to 180 MeV. Experimental data demonstrate that the dynamic-stress increases SRAMs sensitivity as well as MBUs occurrence for both the memory types. We also show that both SEU and MBU cross section may depend on memory architecture and memory utilization.

Mots clés: SRAM; soft error rate; Multiple bit upset

Domaines: Electronique

Paolo Rech, Jean-Marc J.-M. Galliere, Patrick Girard, Alessio Griffoni, Jérôme Boch, et al.. Neutron-Induced Multiple Bit Upsets on Two Commercial SRAMs Under Dynamic-Stress. IEEE Transactions on Nuclear Science, 2012, 59 (4), pp.893-899. ⟨10.1109/TNS.2012.2187218⟩. ⟨lirmm-00805031⟩