POPS: A tool for Delay/Power Performance/Optimization

Nadine Azemard (1) , Michel Aline (2) , Daniel Auvergne (2)

1 SysMIC - Conception et Test de Systèmes MICroélectroniques
2 LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier

Based on an incremental path search algorithm, this paper addresses the problem of performance driven path classification by sizing selected gates on the shortest and the longest identified paths of the circuit. Delay and power/area constraints are managed using circuit path sizing alternatives defined through a realistic evaluation of gate power and delay. Implemented in the POPS tool (Performance Optimization by Path Selection), the accuracy of this technique is compared to evaluation obtained from industrial tools on examples of path enumeration and optimization evaluated on several ISCAS'85 benchmarks.

Domaines: Modélisation et simulation; Micro et nanotechnologies/Microélectronique

Nadine Azemard, Michel Aline, Daniel Auvergne. POPS: A tool for Delay/Power Performance/Optimization. ASIC-SoC: International ASIC/SOC Conference, Sep 2000, Arlington, VA, United States. pp.276-280, ⟨10.1109/ASIC.2000.880715⟩. ⟨lirmm-00239434⟩