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Communication Dans Un Congrès Année : 2007

Improvement of Dual Rail Logic as a Countermeasure Against DPA

Résumé

Dual rail logic is considered as a relevant hardware countermeasure against Differential Power Analysis (DPA) by making power consumption data independent. In this paper, we deduce from a thorough analysis of the robustness of dual rail logic against DPA the design range in which it can be considered as effectively robust. Surprisingly this secure design range is quite narrow. We therefore propose the use of an improved logic, called Secure Triple Track Logic, as an alternative to more conventional dual rail logics. To validate the claimed benefits of the logic introduced herein, we have implemented a sensitive block of the Data Encryption Standard algorithm (DES) and carried out by simulation DPA attacks.
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Dates et versions

lirmm-00186174 , version 1 (08-11-2007)

Identifiants

Citer

Hanitriniaina Razafindraibe, Michel Robert, Philippe Maurine. Improvement of Dual Rail Logic as a Countermeasure Against DPA. VLSI-SoC 2007 - IFIP International Conference on Very Large Scale Integration, Oct 2007, Atlanta, GA, United States. pp.270-275, ⟨10.1109/VLSISOC.2007.4402510⟩. ⟨lirmm-00186174⟩
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