ADOFs and Resistive-ADOFs in SRAM Address Decoders: Test Conditions and March Solutions

Patrick Girard (1) , Luigi Dilillo (1) , Serge Pravossoudovitch (1) , Arnaud Virazel (1) , Magali Bastian Hage-Hassan (2) , Simone Borri (2)

1 SysMIC - Conception et Test de Systèmes MICroélectroniques
2 INFINEON - SOPHIA - Infineon Technologies France

This paper presents a comparative analysis of ADOFs (Address Decoder Open Faults) and resistive-ADOFs in embedded-SRAMs. Such faults are the primary target of this study because they are hard-to-detect faults. These faults are caused by some particular defects which may appear in the parallel transistor network of the logic gates in the address decoders. With this study, we show that the test conditions required for ADOFs testing (sensitization and observation) are also useful for resistive-ADOFs detection, but more stringent timing requirements are needed. In the last part of the paper, we propose a study on the conditions to detect ADOFs with March tests. Moreover, we propose new March elements, which are effective for ADOF testing, and which can be added to existing March tests.

Mots clés: Test; Mémoires RAM; Address Decoder Fault

Domaines: Micro et nanotechnologies/Microélectronique

Patrick Girard, Luigi Dilillo, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian Hage-Hassan, et al.. ADOFs and Resistive-ADOFs in SRAM Address Decoders: Test Conditions and March Solutions. Journal of Electronic Testing: : Theory and Applications, 2006, 22 (3), pp.287-296. ⟨10.1007/s10836-006-7761-1⟩. ⟨lirmm-00134769⟩