On-Line Testing of Neuromorphic Hardware

Theofilos Spyrou (1) , Haralampos-G. Stratigopoulos (1)

1 CIAN - Circuits Intégrés Numériques et Analogiques

We propose an on-line testing methodology for neuromorphic hardware supporting spiking neural networks. Testing aims at detecting in real-time abnormal operation due to hardware-level faults, as well as screening of outlier or corner inputs that are prone to misprediction. Testing is enabled by two on-chip classifiers that prognosticate, based on a low-dimensional set of features extracted with spike counting, whether the network will make a correct prediction. The system of classifiers is capable of evaluating the confidence of the decision, and when the confidence is judged low a replay operation helps to resolve the ambiguity. The testing methodology is demonstrated by fully embedding it in a custom FPGA-based neuromorphic hardware platform. It operates in the background being totally nonintrusive to the network operation, while offering a zero-latency test decision for the vast majority of inferences.

Mots clés: Neuromorphic computing; spiking neural networks; testing; reliability

Domaines: Intelligence artificielle [cs.AI]; Micro et nanotechnologies/Microélectronique

Theofilos Spyrou, Haralampos-G. Stratigopoulos. On-Line Testing of Neuromorphic Hardware. 2023 IEEE European Test Symposium (ETS), May 2023, Venise, Italy. pp.1-6, ⟨10.1109/ETS56758.2023.10174077⟩. ⟨hal-04060634⟩