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Communication Dans Un Congrès Année : 2021

An Investigation on Inherent Robustness of Posit Data Representation

Résumé

As the dimensions and operating voltages of computer electronics shrink to cope with consumers' demand for higher performance and lower power consumption, circuit sensitivity to soft errors increases dramatically. Recently, a new data-type is proposed in the literature called posit data type. Posit arithmetic has absolute advantages such as higher numerical accuracy, speed, and simpler hardware design than IEEE 754-2008 technical standard-compliant arithmetic. In this paper, we propose a comparative robustness study between 32-bit posit and 32-bit IEEE 754-2008 compliant representations. At first, we propose a theoretical analysis for IEEE 754 compliant numbers and posit numbers for single bit flip and double bit flips. Then, we conduct exhaustive fault injection experiments that show a considerable inherent resilience in posit format compared to classical IEEE 754 compliant representation. To show a relevant use-case of fault-tolerant applications, we perform experiments on a set of machine-learning applications. In more than 95% of the exhaustive fault injection exploration, posit representation is less impacted by faults than the IEEE 754 compliant floating-point representation. Moreover, in 100% of the tested machine-learning applications, the accuracy of posit-implemented systems is higher than the classical floating-point-based ones.

Dates et versions

hal-03501606 , version 1 (23-12-2021)

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Citer

Ihsen Alouani, Anouar Ben Khalifa, Farhad Merchant, Rainer Leupers. An Investigation on Inherent Robustness of Posit Data Representation. 2021 34th International Conference on VLSI Design and 2021 20th International Conference on Embedded Systems (VLSID), Feb 2021, Guwahati, India. pp.276-281, ⟨10.1109/VLSID51830.2021.00052⟩. ⟨hal-03501606⟩
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