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Hardware Based Loop Optimization for CGRA Architectures

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https://hal.archives-ouvertes.fr/hal-03345346
Contributor : Kevin Martin Connect in order to contact the contributor
Submitted on : Wednesday, September 15, 2021 - 2:57:28 PM
Last modification on : Monday, October 11, 2021 - 2:24:03 PM

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Chilankamol Sunny, Satyajit Das, Kevin Martin, Philippe Coussy. Hardware Based Loop Optimization for CGRA Architectures. Applied Reconfigurable Computing. Architectures, Tools, and Applications, Jun 2021, Rennes, France. pp.65-80, ⟨10.1007/978-3-030-79025-7_5⟩. ⟨hal-03345346⟩

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