A Case for Speculative Strength Reduction

Arthur Perais (1)

1 TIMA-SLS - System Level Synthesis

Most high performance general purpose processors leverage register renaming to implement optimizations such as move elimination or zero-idiom elimination. Those optimizations can be seen as forms of strength reduction whereby a faster but semantically equivalent operation is substituted to a slower operation. In this letter, we argue that other reductions can be performed dynamically if input values of instructions are known in time, i.e.,~prior to renaming. We study the potential for leveraging Value Prediction to achieve that goal and show that in SPEC2k17, an average of 3.3% (up to 6.8%) of the dynamic instructions could dynamically be strength reduced. Our experiments suggest that a state-of-the-art value predictor allows to capture 59.7% of that potential on average (up to 99.6%).

Mots clés: general-purpose; micro-architecture; speculation

Domaines: Architectures Matérielles [cs.AR]

Arthur Perais. A Case for Speculative Strength Reduction. IEEE Computer Architecture Letters, 2021, 20 (1), pp.22-25. ⟨10.1109/LCA.2020.3048694⟩. ⟨hal-03138881⟩