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WPMVP 2019: Proceedings of the 2019 5th Workshop on Programming Models for SIMD/Vector Processing

Abstract : SIMD processing is still a main driver of performance in general purpose processor architectures besides multi-core technology. Both technologies increase the potential performance by factors, but have to be be explicitly utilized by the software. To expose those different levels of parallelism in a productive and manageable way is still an active area of research. NVIDIA stirred the programming interface scene with the development of a simple yet efficient performance-oriented application programmer interface. OpenACC, OpenMP 4.0, OpenCL, Cilk+ and icpc are just examples for many choices available. Additionally, established optimizing compilers still improve significantly in unleashing the SIMD potential. Notable developments on the hardware side include relaxation of alignment requirements and more powerful scatter/gather and shuffle instructions. Recent developments include the introduction of 512bit SIMD units in general purpose processors (AVX512) and new innovations as the Scalable Vector Extension for the ARMv8-A architecture or the NEC Aurora TSUBASA vector processors. The purpose of this workshop is to bring together practitioners and researchers from academia and industry to discuss issues, solutions, and opportunities in enabling application developers to effectively exploit SIMD/vector processing in modern processors. We seek submissions that cover all aspects of SIMD/vector processing. Topics of interests include, but are not restricted to: Programming models for SIMD/vector processing C/C++/Fortran extensions for SIMD (e.g., OpenMP, OpenACC, OpenCL, SIMD intrinsics) New data parallel or streaming programming models for SIMD Exploitation of SIMD/vector in Java, scripting languages, and domain-specific languages Compilers & tools to discover and optimize SIMD parallelism Case study, experience report, and performance analysis of SIMD/vector applications Design of algorithms specially suited to SIMD/vector architecture
Keywords : SIMD Vector processing
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https://hal.archives-ouvertes.fr/hal-03126855
Contributor : Lionel Lacassagne Connect in order to contact the contributor
Submitted on : Monday, February 1, 2021 - 10:13:54 AM
Last modification on : Sunday, June 26, 2022 - 3:04:00 AM

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Jan Eitzinger, Sylvain Jubertie, Lionel Lacassagne, Bertrand Le Gal. WPMVP 2019: Proceedings of the 2019 5th Workshop on Programming Models for SIMD/Vector Processing. Jan Eitzinger; Sylvain Jubertie; Lionel Lacassagne; Bertrand Le Gal. ACM, 2019, ⟨10.1145/3303117⟩. ⟨hal-03126855⟩

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