FPGA implementation of HOOFR bucketing extractor-based real-time embedded SLAM applications

Dai Duong Nguyen (1) , Abdelhafid El Ouardi (2) , Sergio Alberto Rodriguez Florez (2) , Samir Bouaziz (2)

1 HUST - Hanoi University of Science and Technology
2 SATIE - Systèmes et Applications des Technologies de l'Information et de l'Energie

Feature extraction is an important vision task in many applications like simultaneous localization and mapping (SLAM). In the recent computing systems, FPGA-based acceleration have presented a strong competition to GPU-based acceleration due to its high computation capabilities and lower energy consumption. In this paper, we present a high-level synthesis implementation on a SoC-FPGA of a feature extraction algorithm dedicated for SLAM applications. We choose HOOFR extraction algorithm which provides a robust performance but requires a significant computation on embedded CPU. Our system is dedicated for SLAM applications so that we also integrated bucketing detection method in order to have a homogeneous distribution of keypoints in the image. Moreover, instead of optimizing performance by simplifying the original algorithm as in many other researches, we respected the complexity of HOOFR extractor and have parallelized the processing operations. The design has been validated on an Intel Arria 10 SoC-FPGA with a throughput of 54 fps at 1226×370 pixels (handling 1750 features) or 14 fps at 1920×1080 pixels (handling 6929 features).

Mots clés: Features extraction; Parallel image processing; FPGA implementation; Embedded systems

Domaines: Robotique [cs.RO]

Dai Duong Nguyen, Abdelhafid El Ouardi, Sergio Alberto Rodriguez Florez, Samir Bouaziz. FPGA implementation of HOOFR bucketing extractor-based real-time embedded SLAM applications. Journal of Real-Time Image Processing, 2021, 18, ⟨10.1007/s11554-020-00986-9⟩. ⟨hal-02885576⟩