How to speed Connected Component Labeling up with SIMD RLE algorithms

Florian Lemaitre (1) , Arthur Hennequin (1) , Lionel Lacassagne (1)

1 ALSOC - Architecture et Logiciels pour Systèmes Embarqués sur Puce

The research in Connected Component Labeling, although old, is still very active and several efficient algorithms for CPUs and GPUs have emerged during the last years and are always improving the performance. This article introduces a new SIMD run-based algorithm for CCL. We show how RLE compression can be SIMDized and used to accelerate scalar run-based CCL algorithms. A benchmark done on Intel, AMD and ARM processors shows that this new algorithm outperforms the State-of-the-Art by an average factor of ×1.7 on AVX2 machines and ×1.9 on Intel Xeon Skylake with AVX512.

Domaines: Traitement du signal et de l'image [eess.SP]; Automatique / Robotique; Calcul parallèle, distribué et partagé [cs.DC]; Arithmétique des ordinateurs; Architectures Matérielles [cs.AR]; Algorithme et structure de données [cs.DS]; Vision par ordinateur et reconnaissance de formes [cs.CV]; Traitement du signal et de l'image [eess.SP]; Traitement des images [eess.IV]; Robotique [cs.RO]; Mathématique discrète [cs.DM]; Génie logiciel [cs.SE]

Florian Lemaitre, Arthur Hennequin, Lionel Lacassagne. How to speed Connected Component Labeling up with SIMD RLE algorithms. Workshop on Programming Models for SIMD/Vector Processing (WPMVP@PPoPP), Feb 2020, San Diego, Californie, United States. ⟨hal-02492824⟩