Exploiting Transistor Folding Layout as RHBD technique against Single Event Transients

Y. Q. Aguiar , Frédéric Wrobel (1, 2) , J.-L. Autran (3) , F. L. Kastensmidt , P. Leroux , F. Saigné (1, 2) , V. Pouget (1, 2) , Antoine Touboul (1, 2)

1 IES - Institut d’Electronique et des Systèmes
2 RADIAC - Radiations et composants
3 IM2NP - Institut des Matériaux, de Microélectronique et des Nanosciences de Provence

Mots clés: Transistor Folding; Radiation Hardening by Design (RHBD); Single-Event Transient; Monte-Carlo simulation; Circuit Design

Domaines: Electronique

Y. Q. Aguiar, Frédéric Wrobel, J.-L. Autran, F. L. Kastensmidt, P. Leroux, et al.. Exploiting Transistor Folding Layout as RHBD technique against Single Event Transients. IEEE RADECS 2019, Sep 2019, Montpellier, France. pp.1581 - 1589, ⟨10.1109/tns.2020.3003166⟩. ⟨hal-02446833⟩