, The mälardalen wcet benchmarks: Past, present and future

C. Ballabriga, H. Cassé, C. Rochange, and P. Sainrat, Otawa: an open toolbox for adaptive wcet analysis, SEUS, pp.35-46, 2010.
URL : https://hal.archives-ouvertes.fr/hal-01055378

T. Blaß, S. Hahn, and J. Reineke, Write-back caches in WCET analysis, ECRTS, vol.26, p.22, 2017.

A. Colin and I. Puaut, Worst case execution time analysis for a processor with branch prediction, IRISA, 1999.

R. I. Davis, S. Altmeyer, and J. Reineke, Analysis of write-back caches under fixedpriority preemptive and non-preemptive scheduling. technical report, 2016.

C. Ferdinand, F. Martin, and R. Wilhelm, Applying compiler techniques to cache behavior prediction, 1997.

C. Ferdinand and R. Wilhelm, On predicting data cache behavior for real-time systems, Lecture notes in computer science, pp.16-30, 1998.

D. Hardy and I. Puaut, WCET analysis of multi-level non-inclusive set-associative instruction caches, RTSS'08, 2008.

X. Li, A. Roychoudhury, and T. Mitra, Modeling out-of-order processors for software timing analysis, Real-Time Systems Symposium, pp.92-103, 2004.

Y. S. Li and S. Malik, Performance analysis of embedded software using implicit path enumeration, Workshop on Languages, Compilers, and Tools for Real-Time Systems, pp.88-98, 1995.

Y. S. Li, S. Malik, and A. Wolfe, Efficient microarchitecture modelling and path analysis for real-time software, Real-Time Systems Symposium, pp.254-263, 1995.

Y. Li, S. Malik, and A. Wolfe, Cache modeling for real-time software: Beyond direct mapped instruction caches, Real-Time Systems Symposium, pp.254-263, 1996.

C. Maiza and C. Rochange, History-based schemes and implicit path enumeration, WCET, 2006.

C. Rochange and P. Sainrat, A contextparameterized model for static analysis of execution times, Transactions on High-Performance Embedded Architectures and Compilers II, pp.222-241, 2009.