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Using execution graphs to model a prefetch and write buffers and its application to the Bostan MPPA

Abstract : Verifying the temporal properties of critical systems embedded in vehicles, like planes or cars, is crucial to avoid catastrophic issues. A key component of this verification is the Worst Case Execution Time (WCET) of the programs composing these systems. A common and sound approach to compute WCET is based on static analysis of the programs that requires, in turn, to precisely model the behavior and the timings of the hardware. Processor-specific features such as pipelines, caches, and buffers influence the hardware performances significantly. Hence taking processor features into account when estimating WCET is essential. Modeling the processor's features formally to ensure safe and accurate estimation is then a must. In this paper, we present the methodology applied to capture the behavior of prefetch and write buffers of the Kalray Bostan MPPA microprocessor, and to incorporate the established models with the Execution Graph (XG) to obtain WCET estimation. These analyses are then applied to the Mälardalen benchmark suite and the experimentation results validate the feasibility of our approach.
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https://hal.archives-ouvertes.fr/hal-02441594
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Submitted on : Wednesday, January 15, 2020 - 10:55:04 PM
Last modification on : Wednesday, October 27, 2021 - 4:39:33 AM
Long-term archiving on: : Thursday, April 16, 2020 - 5:33:28 PM

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  • HAL Id : hal-02441594, version 1
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Wei-Tsun Sun, Hugues Cassé, Christine Rochange, Hamza Rihani, Claire Maiza. Using execution graphs to model a prefetch and write buffers and its application to the Bostan MPPA. 9th European Congress on Embedded real time Software and Systems (ERTS 2018), Jan 2018, Toulouse, France. ⟨hal-02441594⟩

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