Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system

C. Tanougast (1) , Y. Berviller (1) , P. Brunet (1) , Serge Weber (1) , Hassan Rabah

1 LIEN - Laboratoire d'Instrumentation Electronique de Nancy

Domaines: Electronique; Traitement du signal et de l'image [eess.SP]; Energie électrique; Micro et nanotechnologies/Microélectronique

C. Tanougast, Y. Berviller, P. Brunet, Serge Weber, Hassan Rabah. Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system. Microprocessors and Microsystems: Embedded Hardware Design , 2003, 27 (3), pp.115-130. ⟨10.1016/S0141-9331(02)00102-3⟩. ⟨hal-02337831⟩