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Extending SMT Solvers to Higher-Order Logic

Haniel Barbosa 1 Andrew Reynolds 1 Daniel El Ouraoui 2, 3 Cesare Tinelli 1 Clark Barrett 4 
2 VERIDIS - Modeling and Verification of Distributed Algorithms and Systems
MPII - Max-Planck-Institut für Informatik, Inria Nancy - Grand Est, LORIA - FM - Department of Formal Methods
3 MOSEL - Proof-oriented development of computer-based systems
LORIA - FM - Department of Formal Methods
Abstract : SMT solvers have throughout the years been able to cope with increasingly expressive formulas, from ground logics to full first-order logic (FOL). In contrast, the extension of SMT solvers to higher-order logic (HOL) is mostly un-explored. We propose a pragmatic extension for SMT solvers to support HOL reasoning natively without compromising performance on FOL reasoning, thus leveraging the extensive research and implementation efforts dedicated to efficient SMT solving. We show how to generalize data structures and the ground decision procedure to support partial applications and extensionality, as well as how to reconcile quantifier instantiation techniques with higher-order variables. We also discuss a separate approach for redesigning an HOL SMT solver from the ground up via new data structures and algorithms. We apply our pragmatic extension to the CVC4 SMT solver and discuss a redesign of the veriT SMT solver. Our evaluation shows they are competitive with state-of-the-art HOL provers and often outperform the traditional encoding into FOL.
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Submitted on : Monday, September 30, 2019 - 10:03:15 AM
Last modification on : Friday, November 18, 2022 - 9:24:09 AM
Long-term archiving on: : Monday, February 10, 2020 - 4:49:03 AM


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Haniel Barbosa, Andrew Reynolds, Daniel El Ouraoui, Cesare Tinelli, Clark Barrett. Extending SMT Solvers to Higher-Order Logic. CADE-27 - The 27th International Conference on Automated Deduction, Aug 2019, Natal, Brazil. pp.35-54, ⟨10.1007/978-3-030-29436-6_3⟩. ⟨hal-02300986⟩



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