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TLA+ Model Checking Made Symbolic

Igor Konnov 1, 2 Jure Kukovec 3 Thanh-Hai Tran 3 
1 VERIDIS - Modeling and Verification of Distributed Algorithms and Systems
MPII - Max-Planck-Institut für Informatik, Inria Nancy - Grand Est, LORIA - FM - Department of Formal Methods
2 MOSEL - Proof-oriented development of computer-based systems
LORIA - FM - Department of Formal Methods
Abstract : TLA + is a language for formal specification of all kinds of computer systems. System designers use this language to specify concurrent, distributed, and fault-tolerant protocols, which are traditionally presented in pseudo-code. TLA + is extremely concise yet expressive: The language primitives include Booleans, integers, functions, tuples, records, sequences, and sets thereof, which can be also nested. This is probably why the only model checker for TLA + (called TLC) relies on explicit enumeration of values and states. In this paper, we present APALACHE-a first symbolic model checker for TLA +. Like TLC, it assumes that all specification parameters are fixed and all states are finite structures. Unlike TLC, APALACHE translates the underlying transition relation into quantifier-free SMT constraints, which allows us to exploit the power of SMT solvers. Designing this translation is the central challenge that we address in this paper. Our experiments show that APALACHE outperforms TLC on examples with large state spaces.
Keywords : Model checking TLA+ SMT
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Submitted on : Friday, September 6, 2019 - 4:43:42 PM
Last modification on : Friday, July 8, 2022 - 10:10:14 AM
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Igor Konnov, Jure Kukovec, Thanh-Hai Tran. TLA+ Model Checking Made Symbolic. Proceedings of the ACM on Programming Languages, ACM, 2019, 3 (OOPSLA), pp.123:1--123:30. ⟨10.1145/3360549⟩. ⟨hal-02280888⟩



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