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Certified and efficient instruction scheduling. Application to interlocked VLIW processors.

Abstract : CompCert is a moderately optimizing C compiler with a formal, machine-checked, proof of correctness: after successful compilation, the assembly code has a behavior faithful to the source code. Previously, it only supported target instruction sets with sequential semantics, and did not attempt reordering instructions for optimization. We present here a CompCert backend for a VLIW core (i.e. with explicit parallelism at the instruction level), the first CompCert backend providing scalable and efficient instruction scheduling. Furthermore, its highly modular implementation can be easily adapted to other VLIW or non-VLIW pipelined processors.
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https://hal.archives-ouvertes.fr/hal-02185883
Contributor : Sylvain Boulmé <>
Submitted on : Monday, November 23, 2020 - 7:17:23 AM
Last modification on : Saturday, January 30, 2021 - 9:54:16 AM

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Cyril Six, Sylvain Boulmé, David Monniaux. Certified and efficient instruction scheduling. Application to interlocked VLIW processors.. Proceedings of the ACM on Programming Languages, ACM, 2020, OOPSLA 2020, pp.129. ⟨10.1145/3428197⟩. ⟨hal-02185883v3⟩

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