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Communication Dans Un Congrès Année : 2019

Analysis of Test Structure Design Induced Variation in on Si On-wafer TRL Calibration in sub-THz

Résumé

In this paper, we present on-wafer S-parameter measurement of test structures designed and fabricated on silicon substrate for transistor de-embedding upto 220 GHz. Using two different types of reflects (open circuit and short circuit) in on-wafer thru-reflect-line (TRL) calibration, we show that in the on-wafer TRL, some of the error terms could be sensitive to the use of the reflect type and may not contain always exactly the same value with change in reflect type. Further, impact of reflect induced variations in error terms is demonstrated on the on-wafer TRL calibrated S-parameters of de-embedding structures. On basis of the on-wafer TRL calibrated S-parameters of de-embedding structures, we conclude that one type of reflect could suit more in the on-wafer TRL calibration for a de-embedding structure than another type.
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Dates et versions

hal-02163807 , version 1 (24-06-2019)

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Chandan Yadav, Sebastien Fregonese, Marina Deng, Marco Cabbia, Magali de Matos, et al.. Analysis of Test Structure Design Induced Variation in on Si On-wafer TRL Calibration in sub-THz. 2019 IEEE 32nd International Conference on Microelectronic Test Structures (ICMTS), Mar 2019, Kita-Kyushu City, France. pp.132-136, ⟨10.1109/ICMTS.2019.8730962⟩. ⟨hal-02163807⟩
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