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Communication Dans Un Congrès Année : 2019

EMC Improvement with New Architectures of Gate Drivers for SiC MOSFET Devices

Résumé

This paper presents gate driver architectures to improve the common mode current in the full-bridge topology with a phase-shift modulation. The classical gate driver architecture associated to the full-bridge is simulated to evaluate the parasitic circulating current. A new architecture (cascaded architecture) is proposed so as to change the impedance of common mode current pathway: simulations validate the concept. Then, experimental results confirm that the cascaded architecture is better than the classical one. Furthermore, other architectures are proposed and experimental results permit to compared the five proposed architectures to the classical one
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Dates et versions

hal-02130965 , version 1 (16-05-2019)

Identifiants

  • HAL Id : hal-02130965 , version 1

Citer

Luciano Francisco Sousa Alves, Pierre Lefranc, Pierre-Olivier Jeannin, Benoît Sarrazin, Van-Sang Nguyen. EMC Improvement with New Architectures of Gate Drivers for SiC MOSFET Devices. PCIM Europe 2019, May 2019, Nuremberg, Germany. ⟨hal-02130965⟩
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