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Heterogeneous Modelling of an Optical Network-on-Chip with SystemC

Abstract : This paper presents a heterogeneous model of an optical network-on chip (ONoC). An ONoC is an optical interconnect architecture integrated on a system-on-chip, and is intended to replace traditional electrical networks-on-chip (NoC) to overcome their future bandwidth limitations. To evaluate the advantages of a technological implementation of an ONoC, it is necessary to model its behavior and to realize a virtual prototype to estimate its power, latency, area, bandwidth, and subsequently to compare these parameters with the performance of a classical NoC. To model the ONoC at a high abstraction level, a rich system-level design language is used (SystemC). A bottom-up approach is used for the high level ONoC model description, and the performance values used at this level are extracted from the physical level with specific tools and models.
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Contributor : Fabien Mieyeville <>
Submitted on : Friday, March 22, 2019 - 4:12:42 PM
Last modification on : Tuesday, November 19, 2019 - 11:30:44 AM




M. Briere, E. Drouard, Fabien Mieyeville, D. Navarro, I. O'Connor, et al.. Heterogeneous Modelling of an Optical Network-on-Chip with SystemC. 16th IEEE International Workshop on Rapid System Prototyping (RSP'05), Jun 2005, Montreal, France. pp.10-16, ⟨10.1109/RSP.2005.25⟩. ⟨hal-02077107⟩



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