Nanowire Devices

Gérard Ghibaudo (1) , Sylvain Barraud (2) , Mikaël Cassé (2) , Xin Peng Wang (3) , Guo Qiang Lo (3) , Dim-Lee Kwong (3) , Marco Pala (1) , Zheng Fang (3)

1 IMEP-LAHC - Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation
2 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information
3 A*STAR - Agency for science, technology and research [Singapore]

This chapter summarizes the major challenges encountered in the fabrication, electrical characterization and quantum transport simulation of Silicon‐based nanowires (SiNWs) intended for end of the road map logic complementary metal–oxide semiconductor (CMOS) devices. It illustrates the new solutions offered by NW technologies for nonvolatile memory (NVM) technologies both in terms of charge storage and resistive change types. Both top‐down and bottom‐up approaches are widely studied for the fabrication of NW metal‐oxide‐semiconductor field effect transistor (MOSFET) transistors. For the bottom‐up approach, the vapor‐liquidsolid (VLS) mechanism is the most commonly used route for making semiconductor NWs. The top‐down approach combines lithographic steps and anisotropic etching processes or deposition to produce semiconductor NWs. This type of processing offers advantages compared to bottom‐up synthesis techniques in terms of better yields, availability of mature technology and manufacturing techniques provided by the semiconductor industry for many years.

Mots clés: complementary metal–oxide semiconductor (CMOS) metal‐oxide‐semiconductor field effect transistor (MOSFET) nonvolatile memory (NVM) technologies silicon wire nanowire (SiNW) devices vapor‐liquidsolid (V

Domaines: Micro et nanotechnologies/Microélectronique

Gérard Ghibaudo, Sylvain Barraud, Mikaël Cassé, Xin Peng Wang, Guo Qiang Lo, et al.. Nanowire Devices. Ed. by F. Balestra. Beyond‐CMOS Nanodevices 2, Wiley-ISTE, pp.25-95, 2014, Nanoscience and Nanotechnology Series, 978-1-84821-655-6 978-1-11898-513-7. ⟨10.1002/9781118985137.ch2⟩. ⟨hal-02051240⟩