Extraction of the Parasitic Bipolar Gain Using the Back-Gate in Ultrathin FD SOI MOSFETs - Archive ouverte HAL Accéder directement au contenu
Article Dans Une Revue IEEE Electron Device Letters Année : 2015

Extraction of the Parasitic Bipolar Gain Using the Back-Gate in Ultrathin FD SOI MOSFETs

Résumé

We propose a new method to extract the gain of the parasitic bipolar transistor in ultrathin fully-depleted silicon-on-insulator MOSFETs. The method is based on the modulation of the parasitic bipolar effect by back-gate biasing. The bipolar gain can be determined for each transistor, without the need to compare the long and short devices. The proposed method is validated by experimental data and numerical simulations.
Fichier non déposé

Dates et versions

hal-02004030 , version 1 (01-02-2019)

Identifiants

Citer

Fanyu Liu, Irina Ionica, Maryline Bawedin, Sorin Cristoloveanu. Extraction of the Parasitic Bipolar Gain Using the Back-Gate in Ultrathin FD SOI MOSFETs. IEEE Electron Device Letters, 2015, 36 (2), pp.96-98. ⟨10.1109/LED.2014.2385797⟩. ⟨hal-02004030⟩
15 Consultations
0 Téléchargements

Altmetric

Partager

Gmail Facebook X LinkedIn More